SGBAU ADE QUESTION BANK

Unit I

1. P-N Junction:
   • Reverse saturation current ​=30mA at temperature of T=27°c
   • Calculate junction current at applied​=0.7V (forward bias) and applied= 10 V applied​= 10V (reverse bias).
2. Common Emitter Configuration:
   • Draw and explain Input and Output characteristics.
3. P-N Junction Diode Operation:
   • Explain using characteristics.
   • Effect of forward and reverse bias on the depletion region.
4. FET vs. BJT:
   • Provide a comparison between Field-Effect Transistor (FET) and Bipolar Junction Transistor (BJT).
5. BJT as an Amplifier:
   • Explain how a BJT can be used as an amplifier.
6. JFET Parameters:
   • A) Saturation current
   • B) Pinch-off voltage
   • C) Output admittance
7. Depletion Region at P-N Junction:
   • Explain the concept and the effects of forward and reverse bias.
8. Transistor Configurations:
   • Difference between Common-Emitter, Common Base, and Common Collector configurations.

Unit II

1. Operational Amplifier Terms:
   • A) CMRR
   • B) Offset voltage
   • C) Slew rate
2. Voltage Follower:
   • Explain in detail.
   • Advantages of using a voltage follower amplifier.
3. IC 741 Operational Amplifier:
   • Draw and explain the pin configuration.
4. Operational Amplifier as Integrator:
   • Explain the working with formula.
5. Operational Amplifier as Differentiator:
   • Explain the working with formula.
6. Inverting Amplifier:
   • Explain what it is and its applications.
7. Operational Amplifier as Adder:
   • Explain the working.

Unit III

1. Number System Conversions:
   • Convert numbers between different bases (binary, octal, decimal, hexadecimal, excess-3, gray code, BCD).
2. 1’s Complement:
   • Simplify using 1’s complement.
3. Codes Explanation:
   • Grey code, excess-3 code, ASCII code with examples.
4. Subtraction using 2’s Complement:
   • Perform subtraction using 2’s complement method.

Unit IV

1. K-Map Simplification:
   • Simplify boolean equations using K-Map.
2. Express Function in SOP Form:
   • Express given function in SOP form, simplify using K-Map, and realize using NAND gates.
3. Minimization using Boolean Algebra:
   • Minimize given boolean functions using Boolean algebra.
4. Express Function in SOP using NAND Gates:
   • Express a given function in SOP form, simplify using NAND gates, K-Map, and realize using NAND gates.

Unit V

1. Look Ahead Carry Adder:
   • Explain in detail.
2. BCD Subtractor:
   • Explain using 9’s complement.
3. Full Adder Circuit using 3:8 Decoder:
   • Design a full adder circuit.
4. 16:1 Mux using 8:1 and 2:1 Mux:
   • Design a 16:1 Mux.
5. Implement Expression using 8:1 Mux:
   • Implement the given expression using an 8:1 Mux.
6. Odd Parity Generator:
   • Design a 4-bit odd parity generator.
7. Full Subtractor using 3:8 Decoder:
   • Design a full subtractor.
8. 8:1 Mux using NAND Gates:
   • Design an 8:1 Mux using NAND gates.

Unit VI

1. State Diagram, State Table, State Reduction, State Assessment:
   • Write a note on each.
2. Mod 4 Up/Down Counter:
   • Design a mod 4 up/down counter.
3. Sequence Generator using Shift Resistor:
   • Design and implement a sequence generator.
4. Race Around Condition:
   • Explain what it is and how it gets eliminated in master-slave J-K flip-flop.
5. John’s Counter:
   • Explain in detail.
6. 4-bit Sequential Counter using J-K Flip-Flop:
   • Design a 4-bit sequential counter.
7. 3-bit Bidirectional Shift Resistor using D-Flip-Flop:
   • Explain and design.

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